Recently, with increase in a data volume in wireless communication, communication standards with a high data rate have come into use. Among these standards, there are WCDMA (Wideband Code Division Multiple Access), HSUPA (High Speed Uplink Packet Access), WLAN (Wireless LAN) and LTE (Long Term Evolution). In modulated signals in the modulation system, used in these communication standards, signal envelopes are not constant. The modulated signals with non-constant envelopes suffer from a marked difference between an average power and the maximum power, viz., PAR or PARP (Peak to Average (Power) Ratio). An amplifier used to amplify the modulated signal (RFPA: Radio Frequency Power Amplifier) is required to possess a high linearity characteristic so that its output distortion will satisfy a certain desired criterion (specification) even at the maximum power time. As a result, the amplifier, exhibiting high linearity, is lowered in power efficiency except during the maximum power time, for example, during an average power time. Viz., there persists a relationship of tradeoff between the linearity and the efficiency.
As a technique to provide a breakthrough of this trade-off relationship, there has been known a method that varies the power supply voltage of the amplifier in response to an envelope signal of the modulated signal. See Patent Publications 1 and 2, for example.
FIG. 18 depicts a circuit diagram for an envelope amplifier disclosed in FIG. 4 of Patent Publication 2. An envelope amplifier 102 is made up of a linear amplifier 106, a resistor 114 (Rsense), a comparator 108 and a switching amplifier 110. The resistor 114 has its one end connected to an output terminal of the linear amplifier 106. The comparator 108 has the potentials at both ends of the resistor 114 as its input voltages, and the switching amplifier 110 has an output of the comparator 108 as its input. The output of the switching amplifier 110 is coupled to the other end of the resistor 114.
The envelope amplifier 102 delivers a current Iout, proportionate to an envelope input signal Venv, to an amplifier 104 (RFPA). The amplifier 104 has its power supply voltage Vout controlled in response to an envelope voltage of an input modulated signal RFin, whereby the amplifier 104 is improved in power efficiency.
The envelope amplifier 102 operates in response to the envelope signal Venv as follows: The linear amplifier 106 of the voltage follower configuration generates an output voltage OPout correlated with Venv to output an output voltage Vout via a resistor 114. The comparator 108 inputs the potentials at both ends of the resistor 114 to compare the potentials to each other. The switching amplifier 110 delivers an output Vout correlated with the result of comparison output by the comparator 108.
If, in this configuration, an output current Isense of the linear amplifier 106 exceeds a certain constant value, the potential difference across both ends of the resistor 114 increases. With the hysteresis voltage Vhys of the comparator 108, the output of the comparator 108 goes LOW for OPout−Vout>Vhys. An output of a switching element 112 then goes HIGH. An output voltage of the switching element 112 is coupled via the inductor 128 to the output voltage Vout. Thus, a switching current Isw is progressively increased as indicated by the following equation:L·dIsw/dt=Vsw−Vout. 
If the switching current Isw is increased, then OPout<Vout. Part of the current Isw flows this time from the switching amplifier 110 into the linear amplifier 106. If Vout−OPout>Vhys, the output of the comparator 108 goes HIGH in level. The output of the switching element 112 now goes LOW in level, so that the switching current Isw decreases progressively.
The above described circuit, composed of the resistor 114, comparator 108 and the switching amplifier 110, ideally operates at 100 percent efficiency. The envelope amplifier 102 operates with high efficiency by setting the output current Isense so as to be sufficiently smaller than the switching current Isw.
If the envelope amplifier is implemented by a PWM type DC-DC convertor circuit, its output is connected as a power supply voltage for the amplifier 104. Hence, the switching noise poses a problem, so that the internal switching frequency must be set at a lower value. As a result, the cut-off frequency of a low-pass filter, connected to an output side, is also low, thus imposing frequency limitations on the envelope signal Venv.
If, on the other hand, the linear amplifier 106, shown in FIG. 18, is connected to the switching amplifier 110, the switching noise ascribable to the internal switching frequency, generated from the switching element 112, is absorbed by the linear amplifier 106. In this case, only the inductor 128 is connected between the switching element 112 and the output terminal Vout, thus eliminating limitations otherwise imposed on the frequency of the envelope signal Venv.
The linear amplifier 106 thus performs the role not only of generating an output proportionate to the input voltage, but also absorbing the switching noise from the switching amplifier 110. In this case, the resistance value of a resistor, connected between the linear amplifier 106 and the output voltage Vout, must be sufficiently low. However, if desired to implement the circuit shown in FIG. 18 by a CMOS circuit etc., it is difficult to set the value of the resistor 114 at a sufficiently low value keeping its accuracy, such that the resistance value of the resistor 114 will be strongly affected by process variations.
Thus, in the envelope amplifier, shown in FIG. 5 of Patent Publication 2, an output stage 214 of the linear amplifier 206 is split into two portions, as shown herein in FIG. 19. Pch MOS transistors 216, 218, abbreviated herein to PMOS transistors, hereinafter the same, constitute an output stage performing a class AB operation by voltage supplies 224, 226, and have their gates connected together. Nch MOS transistors 220, 222, abbreviated herein to NMOS transistors, hereinafter the same, similarly constitute the output stage, and have their gates connected together. It is noted that an output voltage VoutA of the first output stage (output section), made up of the PMOS transistor 216 and the NMOS transistor 220, is of approximately the same value as the output voltage Vout of the second output stage (output section) made up of the PMOS transistor 218 and the NMOS transistor 222. Hence, the relationship between the output current Imain of the output stage made up of the PMOS transistor 218 and the NMOS transistor 222 and the output current Isense of the output stage made up of the PMOS transistor 216 and the NMOS transistor 220 is determined by a size ratio n of the output stage MOS transistors, such that Imain=n·Isense.
If, in the envelope amplifier 202, constructed as described above, it is desired to set the resistance value of the resistor 114 in FIG. 18 at i.e. 0.01 ohm, it is sufficient for the resistance value of a resistor 227 to be 10 ohm in FIG. 19 on the condition that the current Isense is set at one-thousandth of the current Imain. Hence, the envelope amplifier may readily be implemented by a CMOS circuit. Moreover, there is no necessity to introduce a resistor between the switching amplifier 210 and the linear amplifier 206 that is designed to remove the switching noise produced in the switching amplifier 210. It is thus possible to provide for higher circuit performance than is possible with the circuit configuration shown in FIG. 18.
[Patent Document 1]
    Japanese Patent Kokai Publication No. JP2003-533116A[Patent Document 2]    US Patent Application Publication No. US2009/0289720A1